In circuit design, we refer to a “cascode” as a cascade of two MOS devices stacked vertically.
It is very common to see cascoded structures in analog circuits, where the main goal of cascoding is to increase the output resistance, and in the end, increase the gain. The use of cascoded devices is an alternative (and better method) to boost the gain rather than increasing the length of the input transistor.
The term “cascode” is believed to be the acronym for “cascoded triodes” coming from the vacuum tube times .
By definition, a cascode is the combination of 2 “basic” stages: a common-source + common-gate. I.e. the drain of the first transistor connected to the source of the next transistor.
Simple cascode structure with an ideal current source
Why do we need cascodes?
Cascodes have nice properties to enhance the classical common-source stage:
A simple cascode stage multiplies the output resistance (and therefore the gain) by the intrinsic gain (gm·ro) factor.
The use of cascoded current mirrors suppresses the channel-length modulation effect improving the accuracy of the current copy. See this to know more about channel-length modulation.
But also drawbacks:
Additional voltage headroom may be needed. The supply voltage should be sufficiently high to maintain all the devices in saturation. This can be problematic with low-power circuits which use a low supply voltage, for example, 1V. A popular solution to this is the use of the structure called “folded cascode”.
Reduction of output voltage swing. The output minimum level is limited in order to keep all transistors in saturation.
A simple cascode has the following structure:
From the previous cascode schematic, M1 is the “input device” and M2 the “cascoded device”. It is said that M2 is “stacked” on M1. We can assume that the current drawn in M1 is the same as M2 and equal to gm1·Vin
To calculate the botton output resistance easily, we can consider it as a common-source degenerated with a ro1 resistor.
Rout = (1 + gm2 ro2)ro1 +ro2 ~~ gm2ro1ro2
Quickly we can remember that the cascode multiplies the output resistance with a factor of one intrinsic gain of the cascoded device.
How low can the output voltage go before it crunches and goes to the triode region?
By definition, the gate-source voltage is Vgs = Vth + Vov, where Vov is the overdrive voltage, which should be positive to operate in the saturation region.
The upper device, has therefore the same Vgs voltage, so we obtain a 2Vt + 2Vov voltage on the upper gate node.
If we substract the gate Vgs voltage on the M2 device, we can obtain the drain node voltage of the M1, equals to Vt + Vov.
To get the minimum output voltage, we should add a Vov, which is the minimum voltage that M2 needs to not crunch.
The minimum headroom we need at the output is Vt + 2Vov.
The Rd resistor (or the ideal current source) of the previous case can be exchanged by a PMOS cascode to even increase more the resistance and the gain.
The upper output resistance is equal to [1 + gm3ro3)ro4 + ro3] which can be simplified by approximation to gm3ro3ro4.
So we can say that the gain:
Av = -gm1·[(gm2ro1·ro2) || (gm3ro3ro4)]
The Op. Amp. based on this structure is referred as “telescopic Op. Amp”.
More cascoded devices?
Casodes with more stacked devices can be done, and the output gain and resistance would be constiously multiplied to the intrinsic gain factor with each added device. Nevertheless, for the triple or quadruple cascoode, other secondary effects previously neglected appear and the model we calculated, start to fail. Because they are other things which are not modelled or taken into account such as transistor leak current of the diodes or other resistors. Though, triple cascode is sometimes used, but very rarely more.
The practical problem of cascoding more than a triple cascode is that we have to maintain a minimum Vds to keep the transistors on the saturation region or pinch-off.
This happens similar when scaling devices with Moore’s law.
The supply voltage can not be shrunk, and the more devices we have stacked, the less output swing we obtain, limiting the active range or the headroom. This problem can be partly solved by the folded cascode.
: Design of Analog CMOS Integrated Circuits. Behzad Razavi.