How to start a new Vivado project to create a testbench for programming with Verilog or VHDL languages.
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Scanning Tunneling Microscopy: The new eyes and hands of the scientists
Introduction to the scanning tunneling microscopy (STM), starting with its discovery, basic theory, principles of functionality and operation modes. [Read more…] about Scanning Tunneling Microscopy: The new eyes and hands of the scientists
How to connect eHealth via Bluetooth with Python to Computer or Raspberry PI
I explain how to connect the eHealth sensor board from Cooking Hacks via Bluetooth to a Linux-based PC (or Raspberry Pi) to stream data and plot it on the computer with the bluePy library.
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Sinus wave generator with Verilog and Vivado
This Verilog code generates a sinus wave in FPGAs. It is done with a lookup-table and we will cover different modes with variable and fixed frequency.
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Power-On Reset implementation for FPGA in Verilog and VHDL
A power-on reset for an FPGA is implemented in Verilog and VHDL languages. [Read more…] about Power-On Reset implementation for FPGA in Verilog and VHDL
Difference between Bare Metal vs. Embedded Linux
What is better, an embedded Linux program running in a board or a bare metal application?
What are the advantages or drawbacks of embedded Linux? [Read more…] about Difference between Bare Metal vs. Embedded Linux