This auxiliary block in Cadence is a Nice to Have in your Library!
This block stops or finishes a Cadence transient simulation when an output signal reaches a desired value.
How to snap to grid a Cadence Layout
In DRC checks, the WARNING “OFFGRID vertex on layer M1 at location xx,xxx,xxx in cell XXX”.
How to Find Warning Errors in Cadence (or ignore them)
It is a bit annoying working with schematics in Cadence Virtuoso, and you “CHECK&SAVE” to see the window emerging with the same warnings you already know.
An Overview of On-chip Inductors for Integrated Circuits IC. Types, Pro & Cons
Is it possible to integrate Inductors on-chip? What kind of inductors are available in IC? Are they feasible and useful?
Clock Generator in a FPGA: Full code
How to program an FPGA to output a square clock signal with a variable frequency and with two non-overlapping clock signals.
How to measure the Power of a Thermoelectric genenerator or TEG
Thermoelectric generators (TEG) produce electrical energy from a temperature gradient, but…
- How do I plot the power curve?
- Which voltage range could I extract?
- What would be the minimum temperature difference to generate a determinate voltage (ex. for a cold start-up)?