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Analog

Nmos and Pmos LDO: Differences and Advantages on each Topology

Analog, Circuit Design8 October, 202629 April, 2024 by Alberto L.

Why are the LDOs mainly built with pmos as a pass transistor and not with nmos devices?

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2-phase Non Overlapping Block for Oscillators

Analog, Circuit Design17 December, 20248 March, 2024 by Alberto L.

Generating complementary clock signals from a single oscillator signal is straightforward with the so-called non-overlapping block.

Let’s analyze it!!

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Where is the 0.7V voltage drop of BJTs coming from?

Analog, Circuit Design17 December, 202423 February, 2024 by Alberto L.

Where can we obtain mathematically the ON-voltage or forward-bias voltage in bipolar transistors, which is around 0.7V?

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Design a CMOS Comparator with Hysteresis in Cadence

Analog, Cadence, Circuit Design24 November, 20244 June, 2023 by Alberto L.
comparator with hysteresis

There are many types of comparators, in this example a comparator with hysteresis is analyzed and simulated.

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Noise types in CMOS circuits: Thermal, Flicker and Shot Noise explained

Analog, Circuit Design27 January, 202521 March, 2023 by Alberto L.

Noise is a critical and important factor in achieving high-performance integrated circuits. To design analog circuits, at least a basic understanding of noise is required.

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What is Channel-Lenght Modulation in MOSFETs?

Analog, Circuit Design17 December, 202415 March, 2023 by Alberto L.

Channel-Length Modulation (CLM) is an undesirable second-order effect in MOSFETs, which increases the drain current (Ids) when the drain voltage (Vds) also increases.

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