Circuit Design Archives - Page 5 of 6

European microelectronics Company Clusters: Hubs of Chip Design

From the hundreds of semiconductors and IC Design companies around Europe, many of them tend to be located together or very near.

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FPGA, Verilog, VHDL

How to create a testbench in Vivado to learn Verilog

How to start a new Vivado project to create a testbench for programming with Verilog or VHDL languages.
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Cadence, Circuit Design

Binary to Thermometer decoder in Cadence

A binary-to-thermometer decoder digital block is created in Cadence. The VHDL code example transforms an 8-bit vector into 256 thermometer signals.
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FPGA, Verilog, VHDL

Sinus wave generator with Verilog and Vivado

This Verilog code generates a sinus wave in FPGAs. It is done with a lookup-table and we will cover different modes with variable and fixed frequency.

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FPGA, Verilog, VHDL

Power-On Reset implementation for FPGA in Verilog and VHDL

A power-on reset for an FPGA is implemented in Verilog and VHDL languages. …

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Integrated Circuits

Field-Effect Transistors based on carbon nanotubes (CNTFETs)

A bibliographic review of the state-of-the-art of carbon nanotube transistors (CNTFETs)
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Cadence, Circuit Design, Mixed Signal

How to Setup the gedit text editor as default in Cadence for Code Highligh

As a default Cadence has a non-user friendly text editor, but to code, we need to use another one like gedit. gedit is a small and lightweight text editor that allow you to highlight the text. …

How to Setup the gedit text editor as default in Cadence for Code HighlighRead More »

Cadence, Circuit Design, Integrated Circuits

Parasitic Extraction, Post-layout and Back annotating in Circuit Design

Analog circuits schematics are designed and simulated with ‘realistic’ models in Cadence, estimating roughly how the circuit will work in the real world. …

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Electronics, FPGA, VHDL

Basics of Video Processing on the FPGA of a Zybo using VHDL (I)

Processing video frames require a large amount of computation power, therefore processors may not be powerful enough. …

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Electronics, FPGA, VHDL

Video Processing with Vivado VHDL and ZYBO Board (II)

How to set up a video processing project with Vivado and the board Zybo, using the FPGA and programming it with VHDL.

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Cadence, Circuit Design, Mixed Signal

Ideal Comparator in Cadence (VHDL-AMS) for Mixed Signal

How to write an ideal comparator in Cadence with vhdlams HDL language? The comparator checks if the actual input voltage pin is above the reference voltage or not.

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Cadence, Circuit Design, Mixed Signal, VHDL

Design of a digital Counter in VHDL for CADENCE

A digital counter with N-bits is developed in VHDL in Cadence environment for mixed-signal simulations. …

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