Clock Generator in a FPGA: Full code
How to program an FPGA to output a square clock signal with a variable frequency and with two non-overlapping clock signals. …
How to program an FPGA to output a square clock signal with a variable frequency and with two non-overlapping clock signals. …
Monte Carlo analysis is a statistical technique used to analyze the behavior of a circuit under varying conditions of PVT (Process, Voltage and Temperature) caused by manufacturing or environmental variations (temperature, voltage, mismatch, etc)
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How to performe a Monte Carlo Simulation in Cadence VirtuosoRead More »
How to plot in Matlab a simulation from Cadence? How to export a Cadence graph to Matlab?
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How to export a Plot from a Cadence Simulation to graph in MatlabRead More »
To fabricate a prototype of a IC chip is very expensive and it needs from several months up to 1 year to be finished. WHY???
Let’s explore all the designing steps that a CHIP requires… …
How is the Design Process of Microchips: Analog IC Design Flow to TapeoutRead More »
A model of the solar cell is built in Verilog-ams. This is needed in order to perform the simulation of the MPPT in a Solar Energy Harvester. …
Change the color of some wires in Cadence Virtuoso can be useful in schematics with a lot of wires. …
How to generate a high-frequency PWM signal with an FPGA (Zybo) writing a custom IP in Vivado. …
The fastest FPGA PWM Signal with Zybo and Vivado (VHDL)Read More »
A second order active bandpass filter by cascading two staggered tuned first order bandpass filters is shown, built and tested. …
Pro and Cons of the different Types of IC capacitors that can be introduced in a IC chip. …
Types of IC capacitors available to integrate on chipsRead More »
From the hundreds of semiconductors and IC Design companies around Europe, many of them tend to be located together or very near.
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European microelectronics Company Clusters: Hubs of Chip DesignRead More »
How to start a new Vivado project to create a testbench for programming with Verilog or VHDL languages.
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How to create a testbench in Vivado to learn VerilogRead More »
A binary-to-thermometer decoder digital block is created in Cadence. The VHDL code example transforms an 8-bit vector into 256 thermometer signals.
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