Circuit Design Archives - Page 5 of 5

How to create a testbench in Vivado to learn Verilog

How to start a new Vivado project to create a testbench for programming with Verilog or VHDL languages.
…

How to create a testbench in Vivado to learn VerilogRead More »

Binary to Thermometer decoder in Cadence

A binary-to-thermometer decoder digital block is created in Cadence. The VHDL code example transforms an 8-bit vector into 256 thermometer signals.
…

Binary to Thermometer decoder in CadenceRead More »

FPGA, Verilog, VHDL

Sinus wave generator with Verilog and Vivado

This Verilog code generates a sinus wave in FPGAs. It is done with a lookup-table and we will cover different modes with variable and fixed frequency.

…

Sinus wave generator with Verilog and VivadoRead More »

FPGA, Verilog, VHDL

Power-On Reset implementation for FPGA in Verilog and VHDL

A power-on reset for an FPGA is implemented in Verilog and VHDL languages. …

Power-On Reset implementation for FPGA in Verilog and VHDLRead More »

Integrated Circuits

Field-Effect Transistors based on carbon nanotubes (CNTFETs)

A bibliographic review of the state-of-the-art of carbon nanotube transistors (CNTFETs)
…

Field-Effect Transistors based on carbon nanotubes (CNTFETs)Read More »

Cadence, Circuit Design, Mixed Signal

How to Setup the gedit text editor as default in Cadence for Code Highligh

As a default Cadence has a non-user friendly text editor, but to code, we need to use another one like gedit. gedit is a small and lightweight text editor that allow you to highlight the text. …

How to Setup the gedit text editor as default in Cadence for Code HighlighRead More »

Cadence, Circuit Design, Integrated Circuits

Parasitic Extraction, Post-layout and Back annotating in Circuit Design

Analog circuits schematics are designed and simulated with ‘realistic’ models in Cadence, estimating roughly how the circuit will work in the real world. …

Parasitic Extraction, Post-layout and Back annotating in Circuit DesignRead More »

c users alberto appdata local microsoft windows i

Electronics, FPGA, VHDL

Basics of Video Processing on the FPGA of a Zybo using VHDL (I)

Processing video frames require a large amount of computation power, therefore processors may not be powerful enough. …

Basics of Video Processing on the FPGA of a Zybo using VHDL (I)Read More »

Electronics, FPGA, VHDL

Video Processing with Vivado VHDL and ZYBO Board (II)

How to set up a video processing project with Vivado and the board Zybo, using the FPGA and programming it with VHDL.

…

Video Processing with Vivado VHDL and ZYBO Board (II)Read More »

Cadence, Circuit Design, Mixed Signal

Ideal Comparator in Cadence (VHDL-AMS) for Mixed Signal

How to write an ideal comparator in Cadence with vhdlams HDL language? The comparator checks if the actual input voltage pin is above the reference voltage or not.

…