Mis Circuitos

Binary to Thermometer decoder in VHDL and implemented in Cadence

The thermometer code (also named as unary code) is useful to extract a vector number and use it to drive several switches. The thermometer code converts a n-bit number into a series of ones followed by zeroes of size 2^n.

FPGA Sinus wave generation with Verilog using Vivado

Verilog, VHDL, Vivado

In this article I am going to show how to generate a sinus wave in a FPGA with Verilog and VHDL. I am going to program and demonstrate the functionality with Vivado 2017.4. This is going to be divided into 3 parts:

Fixed frequency sinus-signal
Variable frequency sinus signal
sinusoidal-PWM

Power-On Reset implementation for FPGA in Verilog and VHDL

FPGA, Verilog, VHDL

The Power-On Reset I an electronic circuit that generates a reset impulse, which sets the entire design to an initial and well-known state after the power supply is detected. It often used with a RC circuit in VLSI in chip-design. In Vivado the Xilinx’s Processor System Reset LogiCORE IP provides this functionality.

[Read more…] about Power-On Reset implementation for FPGA in Verilog and VHDL

How to performe a Monte Carlo Simulation in Cadence Virtuoso

Cadence, VLSI

Monte Carlo analysis is a statistical way to analyze a circuit. This simulation allows us to test the process variation and mismatching between devices in a single chip or wafer.

Field-Effect Transistors based on carbon nanotubes (CNTFETs)

VLSI

Abstract – The applications of electronics require each day greater efficiency of the electronic devices that are used today. Among the most important aspects in production of a chip is the area occupied by the circuit: It is desired that electronic devices occupy the smallest possible space. The technology that is used today to manufacture semiconductor devices is reaching the limits, where it is increasingly difficult to obtain reduction in size without affecting other features of the device. This document shows a bibliographical review on nanotechnology, in order to present a research proposal to implement transistors based on carbon nanotubes. [Read more…] about Field-Effect Transistors based on carbon nanotubes (CNTFETs)

How to Setup the gedit text editor as default in Cadence for Code Highligh

Cadence, Mixed Signal

As a default Cadence has a non-user friendly text editor, but to code, we need to use another one like gedit. gedit is a small and lightweight text editor that allow you to highlight the text.

Binary to Thermometer decoder in VHDL and implemented in Cadence

FPGA Sinus wave generation with Verilog using Vivado

Power-On Reset implementation for FPGA in Verilog and VHDL

How to performe a Monte Carlo Simulation in Cadence Virtuoso

Field-Effect Transistors based on carbon nanotubes (CNTFETs)

How to Setup the gedit text editor as default in Cadence for Code Highligh

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