Circuit Design Archives - Page 10 of 11

Binary to Thermometer decoder in Cadence

Cadence, Circuit Design24 November, 202423 March, 2018 by Alberto L.

A binary-to-thermometer decoder digital block is created in Cadence. The VHDL code example transforms an 8-bit vector into 256 thermometer signals.

Sinus wave generator with Verilog and Vivado

FPGA, Verilog, VHDL25 May, 202413 March, 2018 by Alberto L.

This Verilog code generates a sinus wave in FPGAs. It is done with a lookup-table and we will cover different modes with variable and fixed frequency.

Power-On Reset implementation for FPGA in Verilog and VHDL

FPGA, Verilog, VHDL24 November, 202410 March, 2018 by Alberto L.

A power-on reset for an FPGA is implemented in Verilog and VHDL languages.

Field-Effect Transistors based on carbon nanotubes (CNTFETs)

Integrated Circuits31 May, 20214 February, 2018 by Alberto L.

A bibliographic review of the state-of-the-art of carbon nanotube transistors (CNTFETs)

How to Setup the gedit text editor as default in Cadence for Code Highligh

Cadence, Circuit Design, Mixed Signal24 November, 202426 January, 2018 by Alberto L.

As a default Cadence has a non-user friendly text editor, but to code, we need to use another one like gedit. gedit is a small and lightweight text editor that allow you to highlight the text.

Parasitic Extraction, Post-layout and Back annotating in Circuit Design

Cadence, Circuit Design, Integrated Circuits24 November, 202413 January, 2018 by Alberto L.

Analog circuits schematics are designed and simulated with ‘realistic’ models in Cadence, estimating roughly how the circuit will work in the real world.