Change the color of some wires in Cadence Virtuoso can be useful in schematics with a lot of wires.
Circuit Design
The fastest FPGA PWM Signal with Zybo and Vivado (VHDL)
How to generate a high-frequency PWM signal with an FPGA (Zybo) writing a custom IP in Vivado.
Active Filters: 2nd order Tschebychev Bandpass
A second order active bandpass filter by cascading two staggered tuned first order bandpass filters is shown, built and tested.
Types of IC capacitors available to integrate on chips
Pro and Cons of the different Types of IC capacitors that can be introduced in a IC chip.
European microelectronics Company Clusters: Hubs of Chip Design
From the hundreds of semiconductors and IC Design companies around Europe, many of them tend to be located together or very near.
How to create a testbench in Vivado to learn Verilog
How to start a new Vivado project to create a testbench for programming with Verilog or VHDL languages.