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How to Find Warning Errors in Cadence (or ignore them)

Cadence, Circuit Design24 November, 20249 February, 2021 by Alberto L.

It is a bit annoying working with schematics in Cadence Virtuoso, and you “CHECK&SAVE” to see the window emerging with the same warnings you already know.

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An Overview of On-chip Inductors for Integrated Circuits IC. Types, Pro & Cons

Circuit Design, Integrated Circuits16 May, 20253 August, 2020 by Alberto L.
spiral inductor

Is it possible to integrate Inductors on-chip? What kind of inductors are available in IC? Are they feasible and useful?

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Clock Generator in a FPGA: Full code

FPGA, Mixed Signal, VHDL24 November, 202423 June, 2020 by Alberto L.

How to program an FPGA to output a square clock signal with a variable frequency and with two non-overlapping clock signals.

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How to performe a Monte Carlo Simulation in Cadence Virtuoso

Analog, Cadence, Circuit Design24 November, 202419 February, 2020 by Alberto L.

Monte Carlo analysis is a statistical technique used to analyze the behavior of a circuit under varying conditions of PVT (Process, Voltage and Temperature) caused by manufacturing or environmental variations (temperature, voltage, mismatch, etc)

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How to export a Plot from a Cadence Simulation to graph in Matlab

Cadence, Circuit Design24 November, 202410 October, 2019 by Alberto L.
cadence simulation

How to plot in Matlab a simulation from Cadence? How to export a Cadence graph to Matlab?

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Solar Cell Verilog Model for Cadence

Cadence, Circuit Design, Mixed Signal, Verilog24 November, 202418 June, 2019 by Alberto L.
solar cell verilog model

A model of the solar cell is built in Verilog-ams. This is needed in order to perform the simulation of the MPPT in a Solar Energy Harvester.

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