How to Characterize NMOS Devices in Cadence: A Step-by-Step Guide

Struggling to find key parameters for transistors in Cadence? Learn how to quickly and effectively characterize NMOS devices with this comprehensive guide.

Often, when using a new technology in Cadence, which we may don’t know the important parameters (or we might don’t have the Design Reference Manual available). Moreover, we probably don’t want to read through this looooong pdf just to find out, for example, the threshold voltage of a transistor at a certain temperature.

Fortunately, it is quite easy and fast to simulate and get the characteristic curves of a transistor in Cadence. In this short guide, I will show you how to do this and highlight the relevant parameters to pay attention to.

The MOSFET

In this tutorial, we will focus on the Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), a fundamental component in modern integrated circuits. The MOSFET will be treated as a 3-terminal device, connecting the bulk of the NMOS to ground and the PMOS’s bulk to the highest voltage in the circuit (usually vdd).

MOSFETs have three primary terminals: the gate, the source, and the drain. By applying a voltage to the gate, we control the current flow between source and drain terminals. This current flows from the drain to the source in the region called “channel”, which is formed between the source and drain when a sufficient voltage is applied to the gate.

Note that the channel has a length L and a width W, which are two important parameters of the MOSFET and modify the behavior of the transistor. These dimensions determine the current-carrying capability of the transistor and affect parameters such as threshold voltage, transconductance, and overall drive strength.

The threshold voltage (Vth), for instance, is the minimum gate voltage required to create a conductive channel between the source and drain. This voltage can vary with temperature and other conditions, making it a crucial parameter for device characterization.

Test Bench in Cadence

First, let’s create a basic test bench with the device we want to characterize.

The test bench can be seen in the following diagram. We need 2 ideal voltage sources (vdc from the AnalogLib library), the transistor that is going to be tested and, of course, the reference ground (gnd! from the same AnalogLib).

Both vdc sources are parametrized with variables: in my case I chose ”vgs” for the gate voltage and “vds” for the drain voltage, as it can be seen in the schematic below. The source of the transistor, in the case of a NMOS, must be tied to ground. If you want to characterize a PMOS, you must connect the source to vdd.

Maestro Simulation

Now, it is time to open the Assembler (or Explorer if you like). In Assembler, we activate a dc simulation. We need to sweep both variables. There are several ways, the easiest one for me is to sweep the “vds” variable in the simulation config menu and the “vgs” in the design variables.

vds 0 –> 3V (automatic steps)

vgs 0 → 1V (100mV steps)

Parameters and other Metrics

Let’s define the DC characteristics of our transistor. The basic and most relevant parameters are:

• Threshold voltage (Vth). This is the gate voltage required to turn on the transistor and establish the conducting channel between the drain and source.

• Drain current (Id). When designing, we want to know how much current we are able to drive with a certain overdrive, or in other words, how much overdrive I need to drive a certain current.

Another relevant parameter to pay attention are:

• Transconductance (gm). This parameter represents the change in drain current for a unit change in gate-source voltage. It essentially tells you how efficiently the transistor translates a voltage change at the gate into a current change at the drain. Higher gm is desirable for many analog circuits. We would need this parameter if we apply some math formulas, such as the gain of an amplifier.

• Subthreshold Current: This is the small leakage current that flows between the drain and source, even when the gate voltage is below Vth. It’s important for low-power applications.

Characteristic Curves: Analyzing the Results

In the “Result Browser”, we must plot the drain current (it is important to save it before running the simulation!!) and we will get something like the following plot:

From here, we can see how the drain current is increasing for each gate-source voltage step. We can estimate the Vth to be between 600mV and 500mV, likely closer to 600mV rather than 500mV.

The leak current at vgs = 500mV is only 93nA.

To see the threshold voltage graphically, we can change the plot axis and plot the drain current (id) versus the gate-source voltage (vgs). To do that, we must click on “Swap Sweep Var…” as shown in the following pic.

Select the variable to fix on the x-axis. In this case vgs

The simulation I did in the previous example, I chose 100mV voltage steps for the vgs variable. In the next step, we can rerun the simulation with more vgs points to see the transition.

How to get the exact Parameters

The characteristic curves are nice to see graphically the behavior of the device, but to get a more accurate value, we can read the device parametric from the DC operating point of it.

For that, open the Result Browser. Then, open the folder called “dcOpInfo” and then you will have a collection of parameters, as it can be seen in the pictures below.

By following this steps, you should be able to effectively characterize any MOSFET devices in Cadence. These characterization are crucial for optimizing your designs, keep experimenting with different configurations and continue refining your approach to get the most out of your MOSFET devices.

Happy designing! 🙂