Physical Comparison between NMOS vs PMOS Transistors
What are the differences between NMOS and PMOS devices in a CMOS technology? …
Physical Comparison between NMOS vs PMOS TransistorsRead More »
What are the differences between NMOS and PMOS devices in a CMOS technology? …
Physical Comparison between NMOS vs PMOS TransistorsRead More »
The Tie Cells are small circuits used to connect (or tie) gates or input logic gates to vdd power or ground. …
Tie Cells in IC Circuits: WHY? schematic and explanationsRead More »
Why are the LDOs mainly built with pmos as a pass transistor and not with nmos devices? …
Nmos and Pmos LDO: Differences and Advantages on each TopologyRead More »
Generating complementary clock signals from a single oscillator signal is straightforward with the so-called non-overlapping block.
Let’s analyze it!!
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Where can we obtain mathematically the ON-voltage or forward-bias voltage in bipolar transistors, which is around 0.7V? …
Where is the 0.7V voltage drop of BJTs coming from?Read More »
There are many types of comparators, in this example a comparator with hysteresis is analyzed and simulated. …
Design a CMOS Comparator with Hysteresis in CadenceRead More »
Noise is a critical and important factor in achieving high-performance integrated circuits. To design analog circuits, at least a basic understanding of noise is required. …
Noise types in CMOS circuits: Thermal, Flicker and Shot Noise explainedRead More »
Channel-Length Modulation (CLM) is an undesirable second-order effect in MOSFETs, which increases the drain current (Ids) when the drain voltage (Vds) also increases.
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In circuit design, we refer to a “cascode” as a cascade of two MOS devices stacked vertically.
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NMOS Cascode stage on amplifiers or current mirror in CMOSRead More »
IC thyristor-based oscillators offer an ultra-low-power consumption clock alternative for applications where accuracy isn’t important and a low frequency is required. …
Example of a IC Thyristor-based ring oscillator in CadenceRead More »
Monte Carlo analysis is a statistical technique used to analyze the behavior of a circuit under varying conditions of PVT (Process, Voltage and Temperature) caused by manufacturing or environmental variations (temperature, voltage, mismatch, etc)
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How to performe a Monte Carlo Simulation in Cadence VirtuosoRead More »
A second order active bandpass filter by cascading two staggered tuned first order bandpass filters is shown, built and tested. …