How to snap to grid a Cadence Layout
In DRC checks, the WARNING “OFFGRID vertex on layer M1 at location xx,xxx,xxx in cell XXX”. …
Cadence, Circuit Design
Cadence
Cadence, Circuit Design
How to Find Warning Errors in Cadence (or ignore them)
It is a bit annoying working with schematics in Cadence Virtuoso, and you “CHECK&SAVE” to see the window emerging with the same warnings you already know. …
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Analog, Cadence, Circuit Design
How to performe a Monte Carlo Simulation in Cadence Virtuoso
Monte Carlo analysis is a statistical technique used to analyze the behavior of a circuit under varying conditions of PVT (Process, Voltage and Temperature) caused by manufacturing or environmental variations (temperature, voltage, mismatch, etc)
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Cadence, Circuit Design
How to export a Plot from a Cadence Simulation to graph in Matlab
How to plot in Matlab a simulation from Cadence? How to export a Cadence graph to Matlab?
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Cadence, Circuit Design, Mixed Signal, Verilog
Solar Cell Verilog Model for Cadence
A model of the solar cell is built in Verilog-ams. This is needed in order to perform the simulation of the MPPT in a Solar Energy Harvester. …
Cadence, Circuit Design
How to change the wire colour in Cadence
Change the color of some wires in Cadence Virtuoso can be useful in schematics with a lot of wires. …
Cadence, Circuit Design
Binary to Thermometer decoder in Cadence
A binary-to-thermometer decoder digital block is created in Cadence. The VHDL code example transforms an 8-bit vector into 256 thermometer signals.
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Cadence, Circuit Design, Mixed Signal
How to Setup the gedit text editor as default in Cadence for Code Highligh
As a default Cadence has a non-user friendly text editor, but to code, we need to use another one like gedit. gedit is a small and lightweight text editor that allow you to highlight the text. …
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Cadence, Circuit Design, Integrated Circuits
Parasitic Extraction, Post-layout and Back annotating in Circuit Design
Analog circuits schematics are designed and simulated with ‘realistic’ models in Cadence, estimating roughly how the circuit will work in the real world. …
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Cadence, Circuit Design, Mixed Signal
Ideal Comparator in Cadence (VHDL-AMS) for Mixed Signal
How to write an ideal comparator in Cadence with vhdlams HDL language? The comparator checks if the actual input voltage pin is above the reference voltage or not.
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Cadence, Circuit Design, Mixed Signal, VHDL
Design of a digital Counter in VHDL for CADENCE
A digital counter with N-bits is developed in VHDL in Cadence environment for mixed-signal simulations. …
Cadence, Circuit Design, Mixed Signal, VHDL
A variable digital controlled Current Source in CADENCE
A digital model and an analogue circuit of a dependent or adjustable current Source is created in Cadence.
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