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Cadence

Design a CMOS Comparator with Hysteresis in Cadence

Analog, Cadence, Circuit Design24 November, 20244 June, 2023 by Alberto L.
comparator with hysteresis

There are many types of comparators, in this example a comparator with hysteresis is analyzed and simulated.

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List of useful Cadence keyboard Shortcuts or Hotkeys for Virtuoso

Cadence, Circuit Design2 July, 202613 September, 2022 by Alberto L.

What are the most useful keyboard shortcuts in Cadence? With these bindkeys, you will increase your productivity to work better & faster!!

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How to Group Parametric Variables in Cadence

Cadence, Circuit Design24 November, 20244 September, 2022 by Alberto L.

How to perform an efficient parametric simulation in Cadence Virtuoso with a parametric set of variables to reduce the simulations eliminating unuseful runs.

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Example of a IC Thyristor-based ring oscillator in Cadence

Analog, Cadence, Circuit Design24 November, 202424 August, 2022 by Alberto L.

IC thyristor-based oscillators offer an ultra-low-power consumption clock alternative for applications where accuracy isn’t important and a low frequency is required.

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How to Create a new Cell in Cadence with a Loockup Table Model in Verilog-A

Cadence, Mixed Signal24 November, 202423 June, 2022 by Alberto L.

Creating a Verilog model cellview in Cadence for a device using a lookup table is a quick and straightforward method to characterize any physical component.

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VerilogA Code to Stop a Transient Simulation in Cadence

Cadence, Circuit Design, Mixed Signal24 November, 202422 December, 2021 by Alberto L.

This auxiliary block in Cadence is a Nice to Have in your Library!

This block stops or finishes a Cadence transient simulation when an output signal reaches a desired value.

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